M. Winzker, K. Grüger, W. Gehrke, P. Pirsch, "Architecture and Realization of HDTV Subband Filters," IEEE Workshop on Visual Signal Processing and Communications, Raleigh, North Carolina, pp. 21-24, 1992.

Abstract

Monolithic integrated subband filters are key components for compact HDTV codecs. A dedicated architecture which utilizes all a priori known properties of the filter algorithrn reduces the hardware expense significantly. By application of 2D polyphase partitioning the processing dock rate is reduced from the 72 MHz sampling rate to moderate 18 MHz and this reduces the required computational power accordingly. Two chip types for separable 10*14 band splitting and synthesis have been designed, fabricated and successfully tested. The memory for vertical filtering is realized by on-chip parallel shift registers with multiphase clocking. Fixed filter coefficients result in small silicon area for the arithmetic part. Four identical chips form a complete filterbank for luminance and chrominance.